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124
XMEGA A [MANUAL]
8077I–AVR–11/2012
Note:
Reserved settings will not give any timeout for the window.
Bit 1 – WEN: Window Mode Enable
This bit enables the window mode. In order to change this bit, the WCEN bit in “WINCTRL – Window Mode Control
register” on page 123 must be written to one at the same time. This bit is protected by the configuration change
protection mechanism. For a detailed description, refer to “Configuration Change Protection” on page 13.
Bit 0 – WCEN: Window Mode Change Enable
This bit enables the ability to change the configuration of the “WINCTRL – Window Mode Control register” on page 123.
When writing a new value to this register, this bit must be written to one at the same time for the changes to take effect.
This bit is protected by the configuration change protection mechanism, but not protected by the WDT lock fuse.
11.7.3 STATUS – Status register
Bit 7:1 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to zero
when this register is written.
Bit 0 – SYNCBUSY: Synchronization Busy Flag
This flag is set after writing to the CTRL or WINCTRL registers and the data are being synchronized from the system
clock to the WDT clock domain. This bit is automatically cleared after the synchronization is finished. Synchronization will
take place only when the ENABLE bit for the Watchdog Timer is set.
11.8
Register Summary
1011
Reserved
1100
Reserved
1101
Reserved
1110
Reserved
1111
Reserved
WPER[3:0]
Group configuration
Typical closed window periods
Bit
7654321
0
+0x02
–
SYNCBUSY
Read/Write
R
RRRRR
R
Initial Value
0000000
0
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Page
+0x00
CTRL
–
PER[3:0]
ENABLE
CEN
122
+0x01
WINCTRL
–
WPER[3:0]
WEN
WCEN
123
+0x02
STATUS
–
SYNCBUSY
124
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